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Pulse Width Modulated DC-DC Converters

Pulsewidth Modulated DC-to-DC Power Conversion: Circuits, Dynamics, and Control Designs provides engineers, researchers, and students in the power electronics field with comprehensive and complete guidance to understanding pulsewidth modulated (PWM) DC-to-DC power converters. Presented in three parts, the book addresses the circuitry and operation of PWM DC-to-DC converters and their dynamic characteristics, along with in-depth discussions of control design of PWM DC-to-DC converters. Topics include:

Pulse Width Modulated DC-DC Converters

Pulse-width modulation (PWM), or pulse-duration modulation (PDM), is a method of controlling the average power delivered by an electrical signal. The average value of voltage (and current) fed to the load is controlled by switching the supply between 0 and 100% at a rate faster than it takes the load to change significantly. The longer the switch is on, the higher the total power supplied to the load. Along with maximum power point tracking (MPPT), it is one of the primary methods of reducing the output of solar panels to that which can be utilized by a battery.[1] PWM is particularly suited for running inertial loads such as motors, which are not as easily affected by this discrete switching. The goal of PWM is to control a load; however, the PWM switching frequency must be selected carefully in order to smoothly do so.

Pulse-width modulation uses a rectangular pulse wave whose pulse width is modulated resulting in the variation of the average value of the waveform. If we consider a pulse waveform f ( t ) \displaystyle f(t) , with period T \displaystyle T , low value y min \displaystyle y_\textmin , a high value y max \displaystyle y_\textmax and a duty cycle D (see figure 1), the average value of the waveform is given by:

The process of PWM conversion is non-linear and it is generally supposed that low pass filter signal recovery is imperfect for PWM. The PWM sampling theorem[8] shows that PWM conversion can be perfect. The theorem states that "Any bandlimited baseband signal within 0.637 can be represented by a pulsewidth modulation (PWM) waveform with unit amplitude. The number of pulses in the waveform is equal to the number of Nyquist samples and the peak constraint is independent of whether the waveform is two-level or three-level."

Varying the duty cycle of a pulse waveform in a synthesis instrument creates useful timbral variations. Some synthesizers have a duty-cycle trimmer for their square-wave outputs, and that trimmer can be set by ear; the 50% point (true square wave) was distinctive, because even-numbered harmonics essentially disappear at 50%. Pulse waves, usually 50%, 25%, and 12.5%, make up the soundtracks of classic video games. The term PWM as used in sound (music) synthesis refers to the ratio between the high and low level being secondarily modulated with a low frequency oscillator. This gives a sound effect similar to chorus or slightly detuned oscillators played together. (In fact, PWM is equivalent to the sum of two sawtooth waves with one of them inverted.)[10]

In more recent times, the Direct Stream Digital sound encoding method was introduced, which uses a generalized form of pulse-width modulation called pulse-density modulation, at a high enough sampling rate (typically in the order of MHz) to cover the whole acoustic frequencies range with sufficient fidelity. This method is used in the SACD format, and reproduction of the encoded audio signal is essentially similar to the method used in class-D amplifiers.

This work aims at utilizing the utmost resources available in FPGA to derive a new DPWM architecture with a higher operating frequency and lower power consumption. Variable duty cycle PWM pulse ensuing from the DPWM architecture can be used to control the switch which modulates the voltage delivered by the power converters. The architecture was developed with Verilog hardware language and its behavioral simulation results are obtained for functional verification. The netlist is generated, placed and routed and timing analysis is performed. The post layout simulation results are obtained and the resultant binary file is transferred to a low-cost SPATRAN 3A FPGA and now the FPGA can be used to generate a variable duty cycle PWM pulse based on the control inputs. Different combinations of control inputs are given for varying the duty cycle of PWM pulse and results are viewed with a digital storage oscilloscope. The proposed DPWM architecture is explained in Section 2 and its results and discussion are shown in Section 3. The experimental results are shown in Section 4 and conclusion is given in Section 5.

The DC-DC boost converter is a power electronic converter that is placed most especially between a low unregulated voltage power source and a load. Its key function is to step up low voltage power sources to suit the needed application. Some areas of application of DC-DC boost converters are in DC microgrid systems, pulsed lasers, electric trains, X-rays, uninterruptible power systems, inverters, satellites, and wireless power transfers [1]. In the course of its application, it can change an unregulated fixed voltage as in the case of a battery or variable voltage to a controlled variable output voltage depending on the level of the duty cycle (D) [2]. Its input voltage sources could be obtained from solar power supplies, rectified AC voltage supplies, battery, fuel cells, biomass, and supercapacitors [3]. It consists of three nonstorage elements (power electronic switch, freewheeling diode, and power diode), and two storage elements, inductor and capacitor. The DC-DC boost converter can operate both in continuous current mode (CCM) and discontinuous current mode (DCM) based on its area of application.

In switched mode condition, power is transferred from the source to the load by triggering power electronic switches such as MOSFETs or IGBTs. A number of works have been presented on different modulation schemes used in firing different DC-DC boost converters [4, 5]. Some of them are Single pulse-width modulation, multiple pulse-width modulation (MPWM), DC/triangular compared modulation scheme, square-wave modulation, and many others with their merits and demerits [6, 7]. In single pulse-width modulation, there is only one pulse in each half cycle and the width of the pulse is varied to control the output voltage of the converter. Moreover, in this type of PWM scheme, a carrier signal is compared with a square reference wave. The frequency of the carrier is twice the frequency of the reference signal. The triangular wave has a constant amplitude and the square reference wave has a variable amplitude, so that the width of the pulse can be varied to eliminate low harmonic distortion. The major demerit of this scheme is that as the pulse width increases, it contributes heavily to switching losses, increases the harmonic content, and decreases efficiency. In MPWM, many pulses of the same width are produced in each half cycle and the greater harmonic contents can be reduced unlike in the single pulse-width modulation. In a square-wave modulation, one pulse is generated in one-half cycle with a width of 50% of the full cycle. This is formed when a reference sine wave is compared with a zero input potential voltage. It only reduces the low harmonic distortions and pushes the high harmonic distortions to large discrete output filter components. This also increases the cost of production, weight, and the volume of the system.

A conventional staircase modulation scheme as presented in [8] was applied in controlling a hybrid multilevel inverter topology with a reduced number of power electronic components. In [9], another zero crossing digital staircase pulse modulator was used in maximizing the fundamental component and eliminating certain low harmonics in DC/AC converters. Apart from considering only low harmonics, a complex computational analysis was also analysed.

In this paper, a novel modulation scheme known as nonzero staircase modulation scheme with simplified analysis for switching DC-DC boost converters is proposed. It has two distinctive trains of pulse width features for mitigating both low and high harmonic distortions (total harmonic distortion) for power loss reduction in power electronic systems. The proposed modulation scheme is used for single-switched PWM DC-DC boost converters but can also be applied in double-switched DC-DC converters.

When the sensed voltage is greater than the DC reference voltage, it means that the output voltage at that point in time is greater than the desired output voltage of the system; then, the error voltage goes into the PI controller. Immediately after this, the current will flow from the capacitor, C, to through R5, R3, and R2 to discharge the capacitor. As the capacitor, C, discharges, the width of switching signals, W1 and W2 are reduced to bring back the output voltage to the desired output voltage level. On the other hand, if the sensed voltage is lower than the DC reference voltage, it means that the output voltage at that moment is lower than the desired output voltage of the system; then, the error voltage goes into the PI controller to increase the width of switching signals, W1 and W2, making the power switch to operate faster. During this period, the current flows from to charge the capacitor through R2, R3, and R5. Furthermore, if the error voltage becomes zero. When no current flows into or out of the PI controller, the voltage across the capacitor, C, clamps the widths of the pulses. At this point, the output voltage across the load becomes stabilized. The electrical interactions of , Vout, R2, R3, C, and R5 produce the proportional constant, Kp, and integral constant, Ki that controls the switching action in order to stabilize the output voltage of the system. 041b061a72


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